inline asm compiled in XCode for Simulator but failed to compile for Device

I have been googling for quite a long time but still find no solution. I hope someone can help me on this.

I have three inline asm functions as below:

static __inline__ int Bsf(uint32_t Operand) {
  int eax;
  asm __volatile__ (
    "bsfl %0, %0" "nt"
    : "=a" (eax)
    : "0" (Operand)
  );
  return eax;
}

static __inline__ int Bsr(uint32_t Operand) {
  int eax;
  asm __volatile__ (
    "bsrl %0, %0" "nt"
    : "=a" (eax)
    : "0" (Operand)
  );
  return eax;
}

static __inline__ uint64_t TimeStampCounter(void) {
  uint32_t eax, edx;
  asm __volatile__ (
    "rdtsc" "nt"
    : "=a" (eax), "=d" (edx)
    :
  );
  return MAKE_LONG_LONG(eax, edx);
}

They all compiled successfully in XCode for Simulator, but failed when I switched to build for Device - 4.1 (for iPhone ). The message i got is "impossible constraint in asm". I believe the problem is the above assembly code does not work for ARM based cpu. Can someone shed some light on how to re-write the code so it compile for iPhone cpu? It can be either assembly or pure C code. Thanks in advance!

Leo


You could try the ARM clz instruction to replace bsr . I don't know any good replacements for the other two.

Edit: OP clarified some context.

You need to get the Intel® 64 and IA-32 Architectures Software Developer's Manuals. They contain a full instruction set reference which will help you out. Even pseudocode for the bsf / bsr instructions is in there, and can be easily translated into their C equivalents:

int Bsf(uint32_t n) {
{
    int m;

    for (m = 0; m < 32; m++)
    {
        if (n & (1 << m))
            return m;
    }

    return 32;
}

int Bsr(uint32_t n) {
{
    int m;

    for (m = 31; m >= 0; m--)
    {
        if (n & (1 << m))
            return m;
    }

    return 32;
}

The rdtsc instruction reads the processor's time-stamp counter, which is a 64-bit value incremented every clock cycle:

The processor monotonically increments the time-stamp counter MSR every clock cycle and resets it to 0 whenever the processor is reset.

You'll need to figure out why your program needs that information, and how best to translate it to your ARM case.

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