Where the program counter goes after returning the interrupt handler?
Hi I am wondering where the program counter goes when the program returns from interrupt service routine? I know when the interrupt event occurs the PC is pushed into the stack. But what address is pushed into the stack the next one or the same one(just executed one)?When we have
first instruction;
interrupt event here;
go inside the ISR;
exit ISR;
second instruction;
OR
first instruction;
interrupt event here;
go inside the ISR
exit ISR;
first instruction;
I mean, does the PC points to the instruction executed prior to the ISR entrance, or it goes to the next instruction(after return from the ISR)? I hope you get the idea.
Since an interrupt can't be handled until the CPU is in a precise fixed state, if the interrupt is raised in the middle of an instruction then the jump to the interrupt vector procedure will occur after the execution of the instruction.
So when coming back from the interrupt procedure the PC will be pointing to the instruction after the first.
first instruction fetch (PC is updated meanwhile)
first instruction decode
interrupt is raised
first instruction execution
** now and only now the CPU checks for a possible interrupt **
interrupt is present, pushing PC on stack and other things
jump to interrupt address
execution of interrupt
return from interrupt (pop of PC and other things)
second instruction fetch
...
When an instruction is executing then the program counter keeps the address of the next instruction to be executed . When an interrupt occurs, then processor do the following:
Suspends the execution of the program being executed and save its context. This means it saves the address of the next instruction to be executed, ie, the value of the program counter and other relevant data.
Update the program counter with the starting address of that interrupt handler routine.
When the interrupt handler routine is completed, CPU can resume execution of the program at the point of interruption.
Interrupt is occurred at instruction i and after completion user program resumes its execution from i+1 instruction.
Exact behaviour of interrupts are hardware-specific, but the CPU will simply wait until first_instruction is finished. After that, it will push CPU state onto stack (or save it in other way) and start ISR. That means that your ISR will not be executed immediately - there is a tiny delay, which may become an issue in hard realtime applications.
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